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Ederson Davids
Ederson Davids
Research Scholar
United States of America

Public Documents 7
Leveraging Sequential Equivalence Checking in PCIe Lane Bonding Logic Verification
Ederson Davids

Ederson Davids

and 1 more

June 02, 2025
As high-speed communication interfaces continue to evolve, ensuring the reliability and correctness of their underlying logic becomes imperative. This paper presents a detailed exploration of leveraging sequential equivalence checking (SEC) in the verification of PCI Express (PCIe) lane bonding logic. PCIe technology is critical for modern computing architectures, enabling fast data transfer across multiple lanes. However, the complexity of PCIe designs poses significant challenges in verification, particularly when it comes to ensuring that lane bonding mechanisms function correctly.
Formal Protocol Coverage Closure for DDR Controllers Using JasperGold or VC Formal
Ederson Davids

Ederson Davids

and 1 more

June 02, 2025
In the rapidly evolving landscape of digital design, ensuring the correctness of complex systems such as DDR (Double Data Rate) memory controllers is critical. This work explores the use of formal verification techniques, specifically focusing on protocol coverage closure, to ascertain the reliability and robustness of DDR controllers. Utilizing tools such as
Assertion-Based Formal Verification of Power and Clock Management in PCIe Transceiver...
Ederson Davids

Ederson Davids

and 1 more

June 02, 2025
The rapid evolution of high-speed data communication technologies, particularly in the realm of Peripheral Component Interconnect Express (PCIe) transceivers, necessitates robust verification methodologies to ensure the reliability and performance of power and clock management systems. Effective management of power states and clock signals is crucial for
CDC and RDC Verification in DDR and PCIe Designs Using Static Timing and Formal Techn...
Ederson Davids

Ederson Davids

and 1 more

June 02, 2025
In the rapidly evolving landscape of high-speed digital interfaces, the verification of Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) mechanisms is paramount, particularly in the context of Double Data Rate (DDR) and Peripheral Component
Deep Learning Models for Medical Diagnostics: Comparative Analysis of CNN, Transforme...
Ederson Davids

Ederson Davids

and 1 more

May 27, 2025
Deep learning has emerged as a transformative tool in medical diagnostics, particularly in the fields of radiology and histopathology. This study presents a comparative analysis of three prominent deep learning architectures: Convolutional Neural Networks (CNNs), Transformers, and hybrid models that combine the strengths of both. We explore the computational methods employed in each architecture, emphasizing their technical novelties, such as the use of attention mechanisms in Transformers and the integration of feature extraction and contextual learning in hybrid models.
Leveraging User Feedback to Continuously Improve Custom Language Models in Vosk-Based...
Ederson Davids

Ederson Davids

and 1 more

May 15, 2025
This paper explores the critical role of user feedback in the continuous improvement of custom language models within Vosk-based speech recognition applications. As the demand for accurate and efficient speech recognition systems grows across various industries, the ability to tailor these systems to meet specific user needs becomes paramount. Custom
Cloud-Based Intrusion Detection Systems: Performance Comparison of Binary Logistic Re...
Ederson Davids

Ederson Davids

and 1 more

May 05, 2025
As cyber threats continue to evolve in complexity and scale, the need for effective Intrusion Detection Systems (IDS) has become increasingly critical, particularly in cloud computing environments. This study examines the performance of Binary Logistic Regression (BLR)

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