Edge-AI applications face huge challenges in resource-constrained environments, particularly in enhancing computational efficiency within bandwidth limitations. This work proposes the Logarithmic-Posit-enabled Reconfigurable edge-AI Engine (LPRE) that enhances hardware efficiency without compromising accuracy. The proposed architecture utilizes timemultiplexed dynamically configurable single-layer hardware to balance resource reuse and bandwidth for multi-layer perceptron and CNN models. Evaluations on LeNet-5 using MNIST demonstrate that LPRE achieves up to 4× throughput enhancement at 8-bit precision with negligible accuracy loss (compared to FP32 baseline), while requiring up to 80% and 50% fewer resources than fixed-point arithmetic and state-of-the-art works, respectively. The design is viable for various edge-AI applications, such as real-time number plate recognition, offering scalable, energy-efficient IoT solutions.