Among the power inverters, modular multilevel converters (MMC) have gained popularity due to their advantages over conventional two-level inverters. Although the MMC utilizes more power switches than traditional inverters, the former exhibits notable benefits such as low total harmonic distortion, low switching losses with lower voltage stress, high power quality, reduced electromagnetic interface, and modularity with numerous degrees of freedom to synthesize output waveforms. Concerning the synthesized voltage quality, several low-frequency modulation techniques have been proposed to produce output voltage with low harmonic content. A particular case of study consisting of a three-phase even-level MMC inverter is taken as a benchmark to comparatively evaluate four methods for synthesizing high-quality output voltage. The employed techniques are ( i) selective harmonic elimination (SHE), ( ii) generalized SHE, ( iii) THD Voltage Minimization, and ( iv) Optimum Nearest Level Modulation, selected based on the phase and line-to-line output voltage THD. The model is formulated to compute the commutating angles to control the MMC submodules. Simulations show individual performance under the same operating conditions. A lab-scale prototype is built to corroborate the theoretical approach. The results allow the selection of the most convenient modulation technique based on the number of commutations and harmonic spectrum.

Brushless DC motor (BLDCM) is widely used in aerospace equipment. But the neuter port in conventional BLDCM windings could lead to torque ripples and low reliability. Each phase winding of the open winding BLDC is connected to an H-bridge inverter, and its phase voltage and phase current could be controlled independently, which has a certain fault tolerance. Firstly, the circuit topology and conduction mode of the open-winding brushless DC motor are introduced, and a Matlab simulation model is established according to the mathematical equation of the motor. Then, the operation characteristics of the open winding brushless DC motor with power device failure are analyzed, and the characteristics of two fault-tolerant control methods, compensation and reconstruction, are discussed. Finally, the open winding brushless DC motor and controller are processed, and the experimental platform is built to verify the operation characteristics of the open winding brushless DC motor with normal operation and compensation operation.

The on-chip extraction of dynamic information from a scene can be addressed with either frame-based CMOS vision, also called smart image sensors, or with dynamic vision sensors, also known as event cameras. When implemented with a pinned photodiode (PPD) as 4-transistor active pixel sensors (4T-APS) the former brings about the benefit of low temporal noise and dark current but without high dynamic range (HDR). The latter comes with the benefits of HDR and fast event detection rate at a low power consumption. The drawback is the background activity noise, which leads to additional hardware or algorithms to keep it low. In essence, the taxonomy of dynamic information extraction with image sensors is that of global shutter solutions and event cameras, each of which with their pros and cons. This paper digs in such differences and similarities focused on mismatch and noise through a global shutter 4T-APS implementation with local HDR incorporated in 180 nm CMOS technology vs conventional logarithmic event sensors found in the literature.

Power electronic circuits play an extremely important role in industrial systems. Parametric failure of components in these circuits are extremely prone to occur, which can easily evolve into catastrophic failures with time. Hence fault diagnosis of circuits can avoid catastrophic failures. In this paper, we propose a channel segmentation residual network (CSRN) for circuit fault diagnosis, in which Gram angular difference filed (GADF) is used to convert the original fault signal into a two-dimensional feature map for input into the CSRN. The channels of the input feature map are distinguished by selecting the main working channels through a channel segmentation mechanism and a Darwin selection mechanism for feature retention and deletion operations. The diagnostic performance of the proposed method is verified on the DC-DC circuit fault dataset, and the results show that the proposed CSRN achieves 97.92% fault classification accuracy for this circuit, which is 1.98%, 13.34% and 6.67% higher than other models, respectively.