This paper describes the topology and operation of a new family of asynchronous frequency dividers called Fractional Digital Regenerative Frequency Dividers (FDRFD). The operation is explained using a digital approach in the time domain and compared to the closest analog equivalent. The fractional behavior is intrinsic to the topology without the need for an external modulator. Integer ratios are also easily obtained and can serve as multimodulus dividers when required. Starting with the elementary version of this kind of divider, a generalization is made with repeated cell patterns in the closed loop for finer control of the fractional ratio. Some measurements on an FPGA-based implementation are provided to validate the theoretical study.