This brief presents a linear high-resolution time-todigital converter (TDC) that employs a pulse-shrinking ring comprised of an even number of alternating delay elements along with a pulse arbiter. This design takes advantage of the linearity of the pulse-shrinking delay ring and the highresolution features of the pulse arbiter, leading to a TDC with good linearity and accuracy. Since arbiters are used to determine the precise location where a circulating pulse dissipates within the delay line, additional bits of resolution (LSBs) are generated and the accumulated nonlinearity remains small. Operating at a resolution of 4 ps, this 13-bit TDC functions effectively in a standard 0.18 μm CMOS technology with a Full-Scale Range (FSR) of 36 ns.