With aggressive technology scaling, lifetime reliability has also become a challenging issue for modern digital circuits due to manufacturing process variation and aging effects. This paper presents a Gen etic algorithm-based multi-objective S equential circuit O ptimization framework called GenSO. GenSO is a novel framework for improving the lifetime reliability of sequential circuits modeled as Finite State Machines (FSMs) along with their initial delay and power consumption. The proposed framework takes advantages of cross layer approach in which a process variation- and aging-aware gate-level delay degradation model is used to compute the circuit lifetime reliability. A metric called Guardband-Aware Reliability (abbreviated as GAR) is proposed that is capable of fairly evaluating the FSM lifetime reliability with regard to the guardband and timing yield determined by the designer. Then, a multi-objective genetic algorithm is employed to improve the delay, power consumption, and lifetime reliability of the sequential circuits modelled in FSM. Experimental results show that, GenSO can find the non-dominated solutions for sequential circuit design whose initial delay, power consumption, and lifetime reliability are simultaneously optimized. By imposing 15% delay overhead for 6-year life time and also 10% variation ratio, GenSO, on average, outperforms reliability of the circuit by 64.34 % comparing to the state-of-the-art reliability optimization framework for sequential circuits which achieves less than 30% improvement in lifetime reliability.