Introduction: The SAR is a popular ADC architecture with simple structure and low power. Aside from the ADC core, in practical applications, a SAR ADC often requires the front-end input driver and reference buffer, as shown in Fig. 1. However, limited by the sampling kT/C noise, the input capacitor of a SAR ADC has to be large to achieve high resolution. This makes it costly to design the input driver and reference buffer [1,2]. The kT/C cancellation technique can effectively reduce the DAC size for SAR ADCs, and thus relax the burden for input drivers and reference buffers [3,4]. However, the prior kT/C cancellation technique suffers from a hard trade-off between the noise, amplifier bandwidth and linearity, which is particularly serious in high-speed applications with high-frequency input signal. In this work, we propose an improved kT/C noise cancellation technique to break the trade-off.