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A 98.5-dB DR Incremental ΔΣ ADC with Dynamic Zoom and Extended Counting for Audio Application
  • Qixuan Wu,
  • Zhiliang Hong
Qixuan Wu
Fudan University
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Zhiliang Hong
Fudan University

Corresponding Author:zlhong@fudan.edu.cn

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Abstract

A three-step discrete-time incremental analog-to-digital converter (IADC) combines zoom, IΔΣM and dual-mode SAR-assisted extended counting (EC). The IADC reuses the SAR ADC to reduce hardware cost by reconfiguring its DAC array to either a 2-bit quantizer of the core IΔΣM or a 5-bit EC ADC. Clocked at 4MHz with an OSR=99, the proposed IADC achieves SNDR and DR of 93dB and 98.5dB, respectively, in a BW of 20.2kHz.
18 Oct 2023Submitted to Electronics Letters
18 Oct 2023Submission Checks Completed
18 Oct 2023Assigned to Editor
21 Oct 2023Reviewer(s) Assigned
06 Nov 2023Review(s) Completed, Editorial Evaluation Pending