Orbital Angular Momentum (OAM)-based Free-Space Optical (FSO) communication systems offer immense potential for high-capacity, secure links, but their performance is highly sensitive to pointing errors. This paper provides a comprehensive analysis of OAM systems under pointing inaccuracies for both short-range terrestrial links and long-range intersatellite communications. For short links, we demonstrate the trade-offs between increasing modulation order and the number of OAM modes, highlighting the potential of low-complexity two-stage detectors to mitigate computational overhead while maintaining robust performance. For inter-satellite links, where severe pointing errors dominate, we propose an innovative asymmetric mode design and optimal beam waist adjustment to enhance robustness against angular misalignments. Simulation results reveal critical insights into the interplay between pointing error intensity, mode selection, and system performance, offering practical guidelines for OAM system design in diverse scenarios. This work bridges the gap between theoretical modeling and real-world implementation, paving the way for reliable OAMbased communication in next-generation terrestrial and space networks.

This paper presents three key contributions: (1) a systematic framework for state feature design in scheduling-domain reinforcement learning through DE and PSVNR perspectives, (2) the concept of undercooked lower bounds that maintains computational efficiency while delivering improved performance with reasonable bound tightness, and (3) integration of Graph Attention Networks, Transformer architecture, and our novel undercooked lower bounds. Our approach outperforms existing methods on 81% of benchmarks, demonstrating exceptional generalizability. We analyze the relationship between lower bound tightness and state value prediction accuracy, bridging classical optimization and modern learning approaches. Our theoretical framework guides state feature design for application of reinforcement learning in scheduling, while achieving substantial performance gains over state-of-the-art methods.

Experimental results from a 65nm CMOS commercial technology SRAM test chip reveal a linear correlation between a new electrical parameter-the word-line voltage margin (VWLVM) and the measured circuit alpha-SER. Additional experiments show that no other memory cell electrical robustness-related parameters exhibit such correlation. The technique proposed is based on correlating the V WLVM to the SER measured on a small number of circuit samples to determine the correlation parameters. Then, the remaining non-irradiated circuits SER is determined from electrical measurements (VWLVM) without the need of additional radiation experiments. This method represents a significant improvement in time and cost, while simplifying the SER-determination methods since most of the circuits do not require irradiation. The technique involves a minor memory design modification that does not degrade circuit performance, while circuit area increase is negligible.