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Improved scheme based on memory voltage for transformer differential protection considering the effects of PLL
  • +2
  • Tao Zheng,
  • Ruozhu Zhang,
  • Ying Chen,
  • jingwen Ai,
  • yilin Sun
Tao Zheng
North China Electric Power University State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources
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Ruozhu Zhang
North China Electric Power University State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources

Corresponding Author:zrz_caroline@126.com

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Ying Chen
North China Electric Power University State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources
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jingwen Ai
North China Electric Power University State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources
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yilin Sun
North China Electric Power University State Key Laboratory of Alternate Electrical Power System with Renewable Energy Sources
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Abstract

Phase-locked loop (PLL) technique is a critical control module applied in photovoltaic (PV) grid-connected control system to synchronize with grid voltage. The PLL error directly affects the response characteristic of PV grid-connected inverter under faults, leading to a mass of harmonic components in the output current of the PV inverter. Especially in the scenario of short-circuit fault with deep voltage sag, the PLL detection error is too significant to be ignored, posing challenges to transformer differential protection. This paper proposes an improved scheme that utilizes a digital computer algorithm to record and store pre-fault voltage, aiming to address the complexity and implementation challenges for phase-lock error in practical engineering applications. By utilizing the memory voltage, the PLL detection error is eliminated, mitigating harmonic distortion in the PV output current and ensuring the reliability of the transformer differential protection. However, introducing memory voltage may increase the short-circuit current of the PV output. Therefore, it is recommended to reduce the amplitude of the short-circuit current by multiplying the inverter port voltage reference value by an appropriate limiting coefficient k and outputting it to the physical system. Finally, the effectiveness of the proposed scheme is verified through MATLAB/Simulink simulation.
26 Jul 2023Submitted to IET Generation, Transmission & Distribution
27 Jul 2023Submission Checks Completed
27 Jul 2023Assigned to Editor
13 Sep 2023Reviewer(s) Assigned
10 Oct 2023Review(s) Completed, Editorial Evaluation Pending
09 Nov 20231st Revision Received
21 Nov 2023Submission Checks Completed
21 Nov 2023Assigned to Editor
21 Nov 2023Review(s) Completed, Editorial Evaluation Pending
21 Nov 2023Reviewer(s) Assigned